--- a/include/zephyr/arch/arm/cortex_m/scripts/linker.ld
+++ b/include/zephyr/arch/arm/cortex_m/scripts/linker.ld
@@ -87,6 +87,9 @@ MEMORY
#endif
FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
+#if defined(CONFIG_SDRAM_LMA_ADJUST)
+ NXP_FLASH_LMA (rx) : ORIGIN = 0x60000000, LENGTH = 4M
+#endif
#if defined(CONFIG_LINKER_DEVNULL_MEMORY)
DEVNULL_ROM (rx) : ORIGIN = DEVNULL_ADDR, LENGTH = DEVNULL_SIZE
#endif
@@ -95,6 +98,17 @@ MEMORY
IDT_LIST (wx) : ORIGIN = 0xFFFF7FFF, LENGTH = 32K
}
+#define GROUP_LINK_IN_AT(where) > where
+#if defined(CONFIG_SDRAM_LMA_ADJUST)
+#undef GROUP_ROM_LINK_IN
+#undef GROUP_DATA_LINK_IN
+#undef GROUP_LINK_IN
+
+#define GROUP_ROM_LINK_IN(vregion, lregion) > lregion AT> NXP_FLASH_LMA
+#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT> NXP_FLASH_LMA
+#define GROUP_LINK_IN(where) > where AT> NXP_FLASH_LMA
+#endif
+
ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
@@ -198,6 +212,9 @@ SECTIONS
#include <zephyr/linker/thread-local-storage.ld>
SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
+#if defined(CONFIG_SDRAM_LMA_ADJUST)
+ ALIGN_WITH_INPUT
+#endif
{
*(.rodata)
*(".rodata.*")
@@ -225,7 +242,7 @@ SECTIONS
#include <zephyr/linker/cplusplus-rom.ld>
-#if defined(CONFIG_BUILD_ALIGN_LMA) || !defined(CONFIG_XIP)
+#if defined(CONFIG_BUILD_ALIGN_LMA) || defined(CONFIG_SDRAM_LMA_ADJUST) || !defined(CONFIG_XIP)
/*
* Include a padding section here to make sure that the LMA address
* of the sections in the RAMABLE_REGION are aligned with those
@@ -334,7 +351,7 @@ GROUP_START(ITCM)
#include <snippets-itcm-section.ld>
__itcm_end = .;
- } GROUP_LINK_IN(ITCM AT> ROMABLE_REGION)
+ } GROUP_LINK_IN_AT(ITCM AT> ROMABLE_REGION)
__itcm_size = __itcm_end - __itcm_start;
__itcm_load_start = LOADADDR(_ITCM_SECTION_NAME);
@@ -373,7 +390,7 @@ GROUP_START(DTCM)
#include <snippets-dtcm-section.ld>
__dtcm_data_end = .;
- } GROUP_LINK_IN(DTCM AT> ROMABLE_REGION)
+ } GROUP_LINK_IN_AT(DTCM AT> ROMABLE_REGION)
__dtcm_end = .;