---

/* Define custom pinmux configurations for SAI2 (I2S) and LPI2C1 */
&pinctrl {
    /* Pinmuxing for LPI2C1 (Control Path) */
    pinmux_lpi2c1: pinmux_lpi2c1 {
        group0 {
            pinmux = <&iomuxc_gpio_sd_b1_02_lpi2c1_scl>,
                     <&iomuxc_gpio_sd_b1_03_lpi2c1_sda>;
            drive-strength = "r0-6";
            drive-open-drain;
            slew-rate = "slow";
        };
    };

    /* Pinmuxing for SAI2 (Data Path: MCLK, TX, RX, BCLK, Sync/LRCK) */
    pinmux_sai2: pinmux_sai2 {
        group0 {
            pinmux = <&iomuxc_gpio_ad_b1_09_sai2_mclk>,
                     <&iomuxc_gpio_ad_b1_13_sai2_tx_data0>,
                     <&iomuxc_gpio_ad_b1_12_sai2_rx_data0>,
                     <&iomuxc_gpio_ad_b1_11_sai2_tx_bclk>,
                     <&iomuxc_gpio_ad_b1_10_sai2_tx_sync>;
            drive-strength = "r0-6";
            slew-rate = "fast";
        };
    };
};

/* Configure Control Path via LPI2C1 */
&lpi2c1 {
    status = "okay";
    pinctrl-0 = <&pinmux_lpi2c1>;
    pinctrl-names = "default";
    clock-frequency = <I2C_BITRATE_STANDARD>; /* 100 kHz */

    /* Instantiate the SGTL5000 codec driver */
    sgtl5000: sgtl5000@a {
        compatible = "nxp,sgtl5000";
        reg = <0x0a>; /* Default SGTL5000 I2C Address (CTRL_ADR0 pin low) */
        status = "okay";
    };
};

/* Configure Data Path via SAI2 */
&sai2 {
    status = "okay";
    pinctrl-0 = <&pinmux_sai2>;
    pinctrl-names = "default";
    
    /* Connect the SAI2 interface to the instantiated audio codec node */
    codec = <&sgtl5000>;
    
    /* Pre-configure standard I2S format constraints for i.MX RT */
    podf = <4>;       /* Clock pre-divider value */
    src = <0>;        /* Clock source selection */
};