# SM configuration file for the MX95 EVK
MAKE soc=MIMX95, board=mcimx95evk, build=gcc_cross
DOX name=MX95EVK, desc="i.MX95 EVK Configuration Data"
include ../devices/MIMX95/configtool/device.cfg
#==========================================================================#
# Board #
#==========================================================================#
BOARD DEBUG_UART_INSTANCE=2
BOARD DEBUG_UART_BAUDRATE=115200
BOARD I2C_INSTANCE=1
BOARD I2C_BAUDRATE=400000
#==========================================================================#
# Common Defines #
#==========================================================================#
NOTIFY: api=notify
GET: api=get
SET: api=set
PRIV: api=priv
ALL: api=all
READONLY: perm=ro
#==========================================================================#
# ELE Domain #
#==========================================================================#
DOM0 name="ELE", did=0
OWNER: perm=sec_rw, api=all
ACCESS: perm=sec_rw, api=none, mdid=none
DATA: perm=rw
# Resources
# Sharing MP access may not be safe if FuSa SW using EDMA2
EDMA2_MP ACCESS
EDMA2_CH0_1 OWNER
V2X_ACC OWNER
# Memory
M33_TCM_SYS DATA, begin=0x020200000, size=256K
OCRAM DATA, begin=0x020480000, size=352K
DDR DATA, begin=0x080000000, end=0x87FFFFFFF, nodbg
#==========================================================================#
# ISP Domain #
#==========================================================================#
DOM10 name="ISP", did=10
OWNER: perm=rw
#==========================================================================#
# V2X Domain #
#==========================================================================#
DOM12 name="V2X", did=12
DFMT1: sa=bypass, pa=bypass
OWNER:
# Resources
V2X_FH OWNER
# Memory
DDR READONLY, begin=0x080000000, end=0x08AFFFFFF, nodbg
DDR DATA, begin=0x08B000000, end=0x08BFFFFFF, nodbg
DDR READONLY, begin=0x08C000000, end=0x87FFFFFFF, nodbg