---

	THUMB

RCC_APB2ENR	EQU	0x40021018

AFIO_EXTICR2	EQU	0x4001000C
AFIO_EXTICR3	EQU	0x40010010
AFIO_EXTICR4	EQU	0x40010014

EXTI_IMR	EQU	0x40010400
EXTI_RTSR	EQU	0x40010408
EXTI_FTSR	EQU	0x4001040C
EXTI_PR		EQU	0x40010414

GPIOA_CRL	EQU	0x40010800
GPIOA_CRH	EQU	0x40010804
GPIOA_IDR	EQU	0x40010808
GPIOA_ODR	EQU	0x4001080C
GPIOA_BSRR	EQU	0x40010810

GPIOB_CRL	EQU	0x40010C00
GPIOB_CRH	EQU	0x40010C04
GPIOB_IDR	EQU	0x40010C08
GPIOB_ODR	EQU	0x40010C0C
GPIOB_BSRR	EQU	0x40010C10

NVIC_ISER0	EQU	0xE000E100
NVIC_ISER1	EQU	0xE000E104
	
SCB_AIRCR	EQU 0xE000ED00
NVIC_IPR0	EQU 0xE000E100

; Bit-band alias addresses
PER_BB_BASE	EQU	0x42000000
PER_BASE	EQU	0x40000000

GPIOA_ODR_OFF	EQU	0x0001080C
GPIOB_ODR_OFF	EQU	0x00010C0C
GPIOA_IDR_OFF	EQU	0x00010808
GPIOB_IDR_OFF	EQU	0x00010C08

PA5_ODR_BB	EQU	PER_BB_BASE + GPIOA_ODR_OFF * 32 + 5  * 4
PB0_ODR_BB	EQU	PER_BB_BASE + GPIOB_ODR_OFF * 32 + 0  * 4
PB13_ODR_BB	EQU	PER_BB_BASE + GPIOB_ODR_OFF * 32 + 13 * 4

PA8_IDR_BB	EQU	PER_BB_BASE + GPIOA_IDR_OFF * 32 + 8  * 4
PB5_IDR_BB	EQU	PER_BB_BASE + GPIOB_IDR_OFF * 32 + 5  * 4
PB15_IDR_BB	EQU	PER_BB_BASE + GPIOB_IDR_OFF * 32 + 15 * 4

	AREA	LAB2MAIN, CODE, READONLY
	EXPORT	main
	EXPORT	EXTI9_5_IRQHandler
	EXPORT	EXTI15_10_IRQHandler

main
	LDR	R0, =RCC_APB2ENR
	LDR	R1, [R0]
	ORR	R1, R1, #0x0D
	STR	R1, [R0]

	LDR	R0, =GPIOA_BSRR
	LDR	R1, =(1 << 5) :OR: (1 << 8)
	STR	R1, [R0]

	LDR	R0, =GPIOB_BSRR
	LDR	R1, =(1 << 0) :OR: (1 << 13)
	STR	R1, [R0]

	; PA5 - output push-pull
	LDR	R0, =GPIOA_CRL
	LDR	R1, [R0]
	LDR	R2, =0xFF0FFFFF
	AND	R1, R1, R2
	LDR	R2, =0x00200000
	ORR	R1, R1, R2
	STR	R1, [R0]

	; PA8 - input with pull-up
	LDR	R0, =GPIOA_CRH
	LDR	R1, [R0]
	LDR	R2, =0xFFFFFFF0
	AND	R1, R1, R2
	ORR	R1, R1, #0x8
	STR	R1, [R0]

	; PB0 - output, PB5 - input with pull-down
	LDR	R0, =GPIOB_CRL
	LDR	R1, [R0]
	LDR	R2, =0xFF0FFFF0
	AND	R1, R1, R2
	LDR	R2, =0x00800002
	ORR	R1, R1, R2
	STR	R1, [R0]

	; PB13 - output, PB15 - input with pull-down
	LDR	R0, =GPIOB_CRH
	LDR	R1, [R0]
	LDR	R2, =0x0F0FFFFF
	AND	R1, R1, R2
	LDR	R2, =0x80200000
	ORR	R1, R1, R2
	STR	R1, [R0]

	; AFIO: EXTI5 -> PB5
	LDR	R0, =AFIO_EXTICR2
	LDR	R1, [R0]
	BIC	R1, R1, #0xF0
	ORR	R1, R1, #0x10
	STR	R1, [R0]

	; AFIO: EXTI8 -> PA8
	LDR	R0, =AFIO_EXTICR3
	LDR	R1, [R0]
	BIC	R1, R1, #0x0F
	STR	R1, [R0]

	; AFIO: EXTI15 -> PB15
	LDR	R0, =AFIO_EXTICR4
	LDR	R1, [R0]
	BIC	R1, R1, #0xF000
	ORR	R1, R1, #0x1000
	STR	R1, [R0]

	LDR	R0, =EXTI_RTSR
	LDR	R1, [R0]
	LDR	R2, =(1 << 5) :OR: (1 << 8) :OR: (1 << 15)
	ORR	R1, R1, R2
	STR	R1, [R0]

	LDR	R0, =EXTI_FTSR
	LDR	R1, [R0]
	LDR	R2, =(1 << 5) :OR: (1 << 8) :OR: (1 << 15)
	ORR	R1, R1, R2
	STR	R1, [R0]

	; Unmask lines 5, 8, 15
	LDR	R0, =EXTI_IMR
	LDR	R1, [R0]
	LDR	R2, =(1 << 5) :OR: (1 << 8) :OR: (1 << 15)
	ORR	R1, R1, R2
	STR	R1, [R0]
	
	LDR R0,=SCB_AIRCR
	LDR R1, =0x05FA0500
	STR R1,[R0]
	
	LDR R0,=NVIC_IPR0
	MOV R1, #0x40
	STRB R1, [R0, #23]
	
	MOV R1, #0x80
	STRB R1, [R0,#40]
	

	; NVIC: enable IRQ23
	LDR	R0, =NVIC_ISER0
	MOV	R1, #(1 << 23)
	STR	R1, [R0]

	; NVIC: enable IRQ40
	LDR	R0, =NVIC_ISER1
	MOV	R1, #(1 << 8)
	STR	R1, [R0]

	CPSIE	I

loop
	WFI
	B	loop


; ISR for EXTI 5..9 (PB5 and PA8)
EXTI9_5_IRQHandler
	PUSH {R4, LR}
	LDR	R0, =EXTI_PR
	LDR	R1, [R0]
	LDR R2, =(1 << 5) :OR: (1 << 8)
	AND R4, R1, R2
	STR	R4, [R0]
	DSB

	TST R4, #(1 << 5)
	BEQ CHECK_l8
	BL GREEN
	
CHECK_l8
	TST R4, #(1 << 8)
	BEQ DONE_IRQ23
	BL RED
	
DONE_IRQ23
	POP {R4, PC}
	
	

; ISR for EXTI 10..15 (PB15)
EXTI15_10_IRQHandler
	PUSH {R4, LR}
	LDR	R0, =EXTI_PR
	LDR	R1, [R0]
	LDR R2, =(1 <<15)
	AND R4, R1, R2
	STR	R4, [R0]
	DSB
	
	TST R4, #(1 << 15)
	BEQ DONE_IRQ40
	BL BLUE
	
DONE_IRQ40
	POP {R4, PC}

GREEN
	PUSH {LR}
	LDR R0, =PB0_ODR_BB
	MOV R2, #0
	STR R2, [R0]
	LDR R3,=5000000
	BL delay
	MOV R2, #1
	STR R2, [R0]
	POP {PC}
	
RED
	PUSH {LR}
	LDR R0, =PA5_ODR_BB
	MOV R2, #0
	STR R2, [R0]
	LDR R3,=5000000
	BL delay
	MOV R2, #1
	STR R2, [R0]
	POP {PC}

BLUE
		PUSH {LR}
	LDR R0, =PB13_ODR_BB
	MOV R2, #0
	STR R2, [R0]
	LDR R3,=5000000
	BL delay
	MOV R2, #1
	STR R2, [R0]
	POP {PC}

delay
	SUBS R3, R3, #1
	BNE delay
	BX LR

	ALIGN
	END