---

; +-------------------------------------------------------------------------+
; |   This file has been generated by The Interactive Disassembler (IDA)    |
; |           Copyright (c) 2017 Hex-Rays, <support@hex-rays.com>           |
; |                      License info: 48-3FBD-7F04-2C                      |
; |                      Jiang Ying, Personal license                       |
; +-------------------------------------------------------------------------+
;
; Input SHA256 : 11BD1D34FD925EBCD256340A8CA86D7C5CAE063407AB3E4A67C3D5AA6F288D1D
; Input MD5    : A90A33032C180A46785703F0E22019F2
; Input CRC32  : 267634E5

; File Name   : C:\Users\элтис\Desktop\элтис\bm1\ZASH_2.HEX
; Format      : Intel Hex Object Format

; Processor       : PIC12Cxx
; Target assembler: Microchip's MPALC
include "P12C508A.INC"



; Segment type: Pure code
; .text (CODE)
; assume bank = 0
; assume status = 0


; RESET

; public RESET
RESET:
b       loc_CODE_8A

loc_CODE_1:
movlw   96

loc_CODE_2:
movwf   R6

loc_CODE_3:
clrwdt
decfsz  R6, f
 b       loc_CODE_3
movlw   0F
andwf   R5, w
addwf   PCL, f
b       loc_CODE_13
b       loc_CODE_18
b       loc_CODE_1D
b       loc_CODE_22
b       loc_CODE_41
b       loc_CODE_47
b       loc_CODE_50
b       loc_CODE_41
b       loc_CODE_1D
b       loc_CODE_5A

loc_CODE_13:
movlw   1
movwf   R5
movlw   1C
tris    GPIO
b       loc_CODE_1

loc_CODE_18:
bcf     R18, 0
movlw   0C
tris    GPIO
incf    R5, f
b       loc_CODE_1

loc_CODE_1D:
movlw   1C
tris    GPIO
incf    R5, f
movlw   4
b       loc_CODE_2

loc_CODE_22:
movlw   9
movwf   R6

loc_CODE_24:
btfss   R18, 0
 b       loc_CODE_2B
decfsz  R6, f
 b       loc_CODE_24
bcf     R17, 0
retlw   0
b       loc_CODE_13

loc_CODE_2B:
movlw   0F
movwf   R6

loc_CODE_2D:
btfsc   R18, 0
 b       loc_CODE_13
decfsz  R6, f
 b       loc_CODE_2D
movlw   0F
movwf   R6

loc_CODE_33:
btfsc   R18, 0
 b       loc_CODE_38
decfsz  R6, f
 b       loc_CODE_33
b       loc_CODE_13

loc_CODE_38:
btfsc   R17, 0
 b       loc_CODE_13
movlw   R9
movwf   FSR
movlw   8
movwf   R20
movwf   R21
movlw   0F
movwf   INDF

loc_CODE_41:
bcf     R18, 0
movlw   0C
tris    GPIO

loc_CODE_44:
incf    R5, f
movlw   2
b       loc_CODE_2

loc_CODE_47:
incf    R5, f
movlw   5
rrf     INDF, f
bnc     loc_CODE_2
movlw   1C
tris    GPIO
movlw   0A
b       loc_CODE_2

loc_CODE_50:
movlw   1C
tris    GPIO
decfsz  R20, f
 b       loc_CODE_57
movlw   8
movwf   R20
b       loc_CODE_44

loc_CODE_57:
movlw   2
subwf   R5, f
b       loc_CODE_2

loc_CODE_5A:
decf    R5, f
decf    R5, f
rrf     INDF, f
bcf     INDF, 7
btfsc   R18, 0
 bsf     INDF, 7
movlw   14
decfsz  R20, f
 b       loc_CODE_2
movlw   8
movwf   R20
incf    FSR, f
movlw   13
decfsz  R21, f
 b       loc_CODE_2
decf    R9, w
bnz     loc_CODE_13
clrf    R7
movlw   R9
movwf   FSR

loc_CODE_6F:
movlw   8
movwf   R21

loc_CODE_71:
movfw   R7
xorwf   INDF, w
andlw   1
bz      loc_CODE_7C
movlw   18
xorwf   R7, f
rrf     INDF, w
rrf     INDF, f
setc
b       loc_CODE_7F

loc_CODE_7C:
rrf     INDF, w
rrf     INDF, f
clrc

loc_CODE_7F:
rrf     R7, f
decfsz  R21, f
 b       loc_CODE_71
incf    FSR, f
decfsz  R20, f
 b       loc_CODE_6F
tstf    R7
bnz     loc_CODE_13
bsf     R17, 0
retlw   0

loc_CODE_8A:
movlw   3F ; '?'
movwf   GPIO
movlw   2C ; ','
tris    GPIO
movlw   0CC
option

loc_CODE_90:
bsf     GPIO, GP0
nop
bsf     GPIO, GP1
movlw   R9
movwf   FSR
movlw   8
movwf   R21

loc_CODE_97:
clrwdt
movfw   GPIO
andlw   0C
bnz     loc_CODE_97
bcf     GPIO, GP0
nop
bcf     GPIO, GP1

loc_CODE_9F:
movlw   8
movwf   R20

loc_CODE_A1:
clrwdt
btfss   GPIO, GP2
 b       loc_CODE_A1
clrc
rlf     INDF, f
btfsc   GPIO, GP3
 bsf     INDF, 0
bsf     GPIO, GP0
movlw   40 ; '@'
movwf   R22

loc_CODE_AB:
clrwdt
decfsz  R22, f
 b       loc_CODE_AF
b       loc_CODE_90

loc_CODE_AF:
btfsc   GPIO, GP2
 b       loc_CODE_AB
bcf     GPIO, GP0
decfsz  R20, f
 b       loc_CODE_A1
incf    FSR, f
decfsz  R21, f
 b       loc_CODE_9F
movfw   R9
xorwf   R10, w
movwf   R9
movfw   R11
xorwf   R12, w
movwf   R10
movfw   R13
xorwf   R14, w
movwf   R11
movfw   R15
xorwf   R16, w
xorwf   R9, f
movfw   R10
xorwf   R11, w
xorwf   R9, w
movwf   R21
movlw   8
movwf   R20

loc_CODE_C9:
rlf     R21, f
skpnc
 bsf     GPIO, GP1
nop
bsf     GPIO, GP0

loc_CODE_CE:
clrwdt
btfsc   GPIO, GP3
 b       loc_CODE_90
btfss   GPIO, GP2
 b       loc_CODE_CE
bcf     GPIO, GP0

loc_CODE_D4:
clrwdt
btfsc   GPIO, GP3
 b       loc_CODE_90
btfsc   GPIO, GP2
 b       loc_CODE_D4
bcf     GPIO, GP1
decfsz  R20, f
 b       loc_CODE_C9

loc_CODE_DC:
clrwdt
btfss   GPIO, GP3
 b       loc_CODE_DC
b       loc_CODE_90
; End of function RESET

call    loc_CODE_13
btfsc   GPIO, GP2
 b       loc_CODE_90
movlw   R9
movwf   FSR
movlw   8
movwf   R21

loc_CODE_E7:
clrwdt
movlw   8
movwf   R20

loc_CODE_EA:
rlf     INDF, f
skpnc
 bsf     GPIO, GP1
bsf     GPIO, GP0

loc_CODE_EE:
btfss   GPIO, GP2
 b       loc_CODE_EE
bcf     GPIO, GP0

loc_CODE_F1:
btfsc   GPIO, GP2
 b       loc_CODE_F1
bcf     GPIO, GP1
decfsz  R20, f
 b       loc_CODE_EA
incf    FSR, f
decfsz  R21, f
 b       loc_CODE_E7

loc_CODE_F9:
clrwdt
btfsc   GPIO, GP3
 b       loc_CODE_F9
btfss   GPIO, GP3
 b       loc_CODE_DC
b       loc_CODE_90
res 100
data  0C00
data 0, 0, 0, 1
res 0DFB
data  0FE7


; Segment type: Internal processor memory & SFR
; .data (DATA)
; assume bank = 0
; assume status = 0
INDF equ 0
TMR0 equ 1
PCL equ 2
STATUS equ 3
 C equ 0
 DC equ 1
 Z equ 2
 PD equ 3
 TO equ 4
 PA0 equ 5
 GPWUF equ 7

FSR equ 4
OSCCAL equ 5
 CAL0 equ 4
 CAL1 equ 5
 CAL2 equ 6
 CAL3 equ 7

GPIO equ 6
 GP0 equ 0
 GP1 equ 1
 GP2 equ 2
 GP3 equ 3
 GP4 equ 4
 GP5 equ 5

R0 equ 7
R1 equ 8
R2 equ 9
R3 equ 0A
R4 equ 0B
R5 equ 0C
R6 equ 0D
R7 equ 0E
R8 equ 0F
R9 equ 10
R10 equ 11
R11 equ 12
R12 equ 13
R13 equ 14
R14 equ 15
R15 equ 16
R16 equ 17
R17 equ 18
R18 equ 19
R19 equ 1A
R20 equ 1B
R21 equ 1C
R22 equ 1D
R23 equ 1E
R24 equ 1F


end ;