---

module indicator2 (
    input wire clk,
    output reg [6:0] segments,
    output reg [7:0] select
);
reg [15:0] count = 16'd0;
reg [2:0] dynamic_temp = 3'd0;
always @(posedge clk) begin
    count <= count + 1'b1;
    if (count == 16'd65535)
        dynamic_temp <= dynamic_temp + 1'b1;
    case (dynamic_temp)
        3'b000: begin
            segments <= 7'b0100100;
            select   <= 8'b01111111;
        end
        3'b001: begin
            segments <= 7'b1000000;
            select   <= 8'b10111111;
        end
        3'b010: begin
            segments <= 7'b0100100;
            select   <= 8'b11011111;
        end
        3'b011: begin
            segments <= 7'b0000010;
            select   <= 8'b11101111;
        end
        3'b100: begin
            segments <= 7'b0111111;
            select   <= 8'b11110111;
        end
        3'b101: begin
            segments <= 7'b01100011;
            select   <= 8'b11111011;
        end
        3'b110: begin
            segments <= 7'b11100011;
            select   <= 8'b11111101;
        end
        3'b111: begin
            segments <= 7'b11110001;
            select   <= 8'b11111110;
        end
    endcase
end
endmodule