Загрузка данных


-- Вычисляем правильный результат
expected_result <= std_logic_vector(unsigned(a_val) * unsigned(b_val));

-- Ловим ошибку и зажигаем светодиод
process(clk)  -- Медленный клок!
begin
    if rising_edge(clk) then
        if save_en = '1' then
            if selected_result /= expected_result then
                error_latch <= '1';
            end if;
        end if;
    end if;
end process;

error_led <= error_latch;

signal sel_delayed : std_logic := '0';

begin
    mux_signal <= data_a when sel = '1' else data_b;
    
    process(clk)
    begin
        if rising_edge(clk) then
            sel_delayed <= sel;  -- задержка на такт
            
            if sel_delayed = '1' then
                reg_signal <= mux_signal;
            else
                reg_signal <= (others => '0');
            end if;
        end if;
    end process;