---

LM0                 name="SM", rpc=none, boot=1, did=2, safe=feenv

DFMT0:              sa=secure
DFMT1:              sa=secure, pa=privileged
OWNER:              perm=sec_rw, api=all
ACCESS:             perm=sec_rw, api=none, mdid=none
TEST_MU:            perm=sec_rw

EXEC:               perm=sec_rwx
DATA:               perm=sec_rw

MODE                msel=1, boot=1
MODE                msel=2, boot=1

# API

# SM CLocks
CLK_ADC                  ALL
CLK_FRO                  ALL
CLK_OSC24M               ALL
CLK_OSC32K               ALL
CLK_SYSPLL1_PFD0         ALL
CLK_SYSPLL1_PFD0_DIV2    ALL
CLK_SYSPLL1_PFD0_UNGATED ALL
CLK_SYSPLL1_PFD1         ALL
CLK_SYSPLL1_PFD1_DIV2    ALL
CLK_SYSPLL1_PFD1_UNGATED ALL
CLK_SYSPLL1_PFD2         ALL
CLK_SYSPLL1_PFD2_DIV2    ALL
CLK_SYSPLL1_PFD2_UNGATED ALL
CLK_SYSPLL1_VCO          ALL
CLK_TEMPSENSE_GPR_SEL    ALL
CLK_TMU                  ALL

# Modified via PERF protocol
CLK_A55                  ALL
CLK_A55C0_GPR_SEL        ALL
CLK_A55C1_GPR_SEL        ALL
CLK_A55C2_GPR_SEL        ALL
CLK_A55C3_GPR_SEL        ALL
CLK_A55C4_GPR_SEL        ALL
CLK_A55C5_GPR_SEL        ALL
CLK_A55MTRBUS            ALL
CLK_A55P_GPR_SEL         ALL
CLK_A55PERIPH            ALL
CLK_BUSAON               ALL
CLK_BUSM7                ALL
CLK_BUSNETCMIX           ALL
CLK_BUSWAKEUP            ALL
CLK_CAMAPB               ALL
CLK_CAMAXI               ALL
CLK_CAMCM0               ALL
CLK_CAMISI               ALL
CLK_DISPAPB              ALL
CLK_DISPAXI              ALL
CLK_DISPOCRAM            ALL
CLK_DRAM_GPR_SEL         ALL
CLK_DRAMALT              ALL
CLK_DRAMAPB              ALL
CLK_ELE                  ALL
CLK_ENET                 ALL
CLK_GPU                  ALL
CLK_GPUAPB               ALL
CLK_HSIO                 ALL
CLK_M33                  ALL
CLK_M7                   ALL
CLK_NOC                  ALL
CLK_NOCAPB               ALL
CLK_NPU                  ALL
CLK_NPUAPB               ALL
CLK_V2XPK                ALL
CLK_V2XPK                ALL
CLK_VPU                  ALL
CLK_VPUAPB               ALL
CLK_VPUJPEG              ALL
CLK_WAKEUPAXI            ALL

# Test CLocks
CLK_ENETPHYTEST200M      ALL
CLK_ENETPHYTEST500M      ALL
CLK_ENETPHYTEST667M      ALL
CLK_HSIOACSCAN480M       ALL
CLK_HSIOACSCAN80M        ALL
CLK_HSIOPCIETEST160M     ALL
CLK_HSIOPCIETEST400M     ALL
CLK_HSIOPCIETEST500M     ALL
CLK_HSIOUSBTEST50M       ALL
CLK_HSIOUSBTEST60M       ALL

# Resources

M33P                OWNER  # CPUs must be first
ANATOP              OWNER
ATU_A               OWNER
ATU_M               OWNER
AXBS_AON            OWNER
BBNSM               OWNER
BLK_CTRL_BBSMMIX    OWNER
BLK_CTRL_DDRMIX     OWNER
BLK_CTRL_GPUMIX     OWNER
BLK_CTRL_NOCMIX     OWNER
BLK_CTRL_NS_AONMIX  OWNER
BLK_CTRL_S_AONMIX   OWNER
BLK_CTRL_WAKEUPMIX  OWNER
CCM                 OWNER
DAP                 OWNER
DDR_CTRL            OWNER
DDR_PHY             OWNER
DDR_PM              OWNER
DRAM_PLL            OWNER
ELE                 OWNER
FSB                 READONLY
GIC                 ACCESS
GPC                 OWNER
GPIO1               OWNER
GPR0                OWNER
GPR1                OWNER
GPR2                OWNER
GPR3                OWNER
GPV_CAMERA          OWNER
GPV_CENTRAL         OWNER
GPV_DISPLAY         OWNER
GPV_HSIO            OWNER
GPV_MAIN            OWNER
GPV_MEGA            OWNER
GPV_VPU             OWNER
IOMUXC              OWNER
IOMUX_GPR           OWNER
JTAG                OWNER
LPI2C1              OWNER
LPUART2             OWNER
M33_CACHE_CTRL      OWNER
M33_PCF             OWNER
M33_PSF             OWNER
M33_TCM_ECC         OWNER
MU1_A               TEST_MU
MU1_B               OWNER
MU2_A               TEST_MU
MU2_B               OWNER
MU3_A               TEST_MU
MU3_B               OWNER
MU4_A               TEST_MU
MU4_B               OWNER
MU5_A               TEST_MU
MU5_B               OWNER
MU6_A               TEST_MU
MU6_B               OWNER
MU_ELE0             OWNER
ROMCP_M33           OWNER
SRAM_CTL_1          OWNER
SRAM_CTL_N          OWNER
SRC                 OWNER
SYSCTR_CTL          OWNER
SYSCTR_RD           OWNER
TEMP_A55            OWNER
TRDC_A              OWNER
TRDC_C              OWNER
TRDC_D              OWNER
TRDC_E              OWNER
TRDC_G              OWNER
TRDC_H              OWNER
TRDC_M              OWNER
TRDC_N              OWNER
TRDC_V              OWNER
TRDC_W              OWNER
TSTMR1              OWNER
WDOG1               OWNER
WDOG2               OWNER

# SAF

CMU_A1              OWNER
CMU_A2              OWNER
CMU_ANA             OWNER
CMU_DDR1            OWNER
CMU_DDR2            OWNER
CMU_N1              OWNER
CMU_N2              OWNER
CMU_W1              OWNER
CMU_W2              OWNER
CRC_A               OWNER
C_STCU              OWNER
DMA_CRC             OWNER
EIM_A               OWNER
EIM_N               OWNER
EIM_NPU             OWNER
EIM_W               OWNER
ERM_A               OWNER
ERM_NPU             OWNER
ERM_W               OWNER
FCCU                OWNER
FCCU_FHID           OWNER
INTM                OWNER
L_STCU_A            OWNER
L_STCU_DDR          OWNER
L_STCU_N            OWNER
L_STCU_NPUMIX       OWNER

# Pins

PIN_FCCU_ERR0         OWNER
PIN_I2C1_SCL          OWNER
PIN_I2C1_SDA          OWNER
PIN_PDM_BIT_STREAM1   OWNER
PIN_UART2_RXD         OWNER
PIN_UART2_TXD         OWNER
PIN_WDOG_ANY          OWNER

# Memory

M33_ROM             EXEC, begin=0x000000000, end=0x00003FFFF
M33_TCM_CODE        EXEC, begin=0x0201C0000, size=256K
M33_TCM_SYS         EXEC, begin=0x020200000, size=256K
M7MIX               DATA, begin=0x04A050000, end=0x04A0AFFFF

# Faults

FAULT_SW3           OWNER, reaction=grp_reset
FAULT_SW4           OWNER, reaction=sys_reset
FAULT_DRAM          OWNER, reaction=sys_reset